chiselX - Chisel with SFC compatibility

Age	Commit message (Collapse)	Author
2015-08-31	Refactor Namespace	Andrew Waterman
	No need for Option, since an empty Set can be used instead.
2015-08-28	Use FIRRTL smem for SeqMem	Andrew Waterman
	Read enables and read-write ports aren't working yet.
2015-08-28	Add poison node	Andrew Waterman

2015-08-27	Redefine masked Mem writes for Mem[Vec]	Andrew Waterman

2015-08-27	Fix bug where flipping top-level I/O had no effect	Andrew Waterman
	The fix is to propagate the flip to the fields in the bundle.
2015-08-27	Vec.apply is for types; Vec.fill is for rvalues	Andrew Waterman

2015-08-27	Expose ChiselExceptions	Andrew Waterman

2015-08-27	Add chisel2 scaladoc for 'when'.	Jim Lawson

2015-08-27	Add chisel2 scaladoc for 'library' code.	Jim Lawson

2015-08-26	Remove Mem from Data hierarchy	Andrew Waterman
	Just like Reg, state elements are not Data.
2015-08-26	Simplify Module internal data structures	Andrew Waterman

2015-08-26	Simplify I/O zero-initialization	Andrew Waterman

2015-08-26	import relevant scaladoc from chisel(2).	Jim Lawson

2015-08-20	Clean up port emission	Andrew Waterman

2015-08-20	Prevent some defs from being marked as Bundle fields	Andrew Waterman

2015-08-20	Remove Port/Kind IR nodes, which merely wrap Data	Andrew Waterman

2015-08-17	Delete unused IR nodes	Andrew Waterman

2015-08-14	more tests	Henry Cook

2015-08-13	Counter tests	Henry Cook

2015-08-13	Make error reporting reentrant	Andrew Waterman

2015-08-13	Deduplicate modules	Andrew Waterman
	This reduces FIRRTL output substantially for e.g. multicore designs.
2015-08-13	Make temporary names locally unique, rather than globally so	Andrew Waterman

2015-08-13	Add back missing () on toBits declaration	Andrew Waterman

2015-08-13	Tighten permissions on some classes & members	Andrew Waterman

2015-08-13	fun with ##	Henry Cook

2015-08-13	Clean up UInt/SInt/Bool companion objects	Andrew Waterman

2015-08-13	Don't fold constants in the frontend	Andrew Waterman
	We need to make a similar change for extract, pending a FIRRTL bug fix.
2015-08-13	Check validity of bit extract ranges	Andrew Waterman

2015-08-13	Avoid importing for single use	Andrew Waterman

2015-08-13	FP stuff doesn't belong in Data	Andrew Waterman

2015-08-13	Cleanup DynamicContext	Henry Cook

2015-08-13	re-privatize class Namespace, fix use of Module/Bundle child namespaces	Henry Cook

2015-08-13	fix recusion bug in Namespace	Henry Cook

2015-08-13	clean up Id and Builder.globalRefMap	Henry Cook

2015-08-13	refactor Namespace	Henry Cook

2015-08-13	Streamline files, breaking up Core.scala and resorting some smaller ones	Henry Cook

2015-08-12	being to convert tests to scala-test; tests compile and run	Henry Cook

2015-08-12	Emitter no longer mutates the refMap	Andrew Waterman

2015-08-12	params and paramsScope objects	Henry Cook

2015-08-12	Marshal the global mutable state into one object	Andrew Waterman
	Hopefully, the Chisel core is now thread-safe.
2015-08-12	Remove old testers for now	Andrew Waterman

2015-08-11	Miscellaneous cleanups	Andrew Waterman

2015-08-11	Suppress runtime type check warnings	Andrew Waterman

2015-08-11	Emit newline at EOF	Andrew Waterman

2015-08-11	Remove useless call to getWidth	Andrew Waterman

2015-08-11	Get tests closer to compiling	Andrew Waterman

2015-08-10	Fix Mux type safety	Andrew Waterman
	The implementation is a total kludge, but at least it's not broken.
2015-08-10	Make Bits.toBool safe	Andrew Waterman
	It now fails if the width is unknown or is not equal to 1. We could consider relaxing this later, defining it as this.orR.
2015-08-10	Force toUInt = asUInt, toSInt = asSInt	Andrew Waterman

2015-08-10	Don't use cloneType for primops	Andrew Waterman
	Doing so results in incorrect code for Bools, because the widths of some Bool primops' results are greater than 1. The alternative would be to make Bool not extend UInt.