chiselX - Chisel with SFC compatibility

Age	Commit message (Collapse)	Author
2022-03-08	Add scanLeftOr and scanRightOr utilies (#2407) (#2437)	mergify[bot]
	Co-authored-by: Jiuyang Liu <liu@jiuyang.me> Co-authored-by: Megan Wachs <megan@sifive.com> Co-authored-by: Jack Koenig <koenig@sifive.com> (cherry picked from commit 73d3c26029c07c17ce179dfead092eab4fb8ae2c) Co-authored-by: Liu Xiaoyi <circuitcoder0@gmail.com>
2022-01-28	Fix Decoder bug for constant 0 and DC (#2363) (#2371)	mergify[bot]
	* Fix the QMC bug for constant and dontcare output. * Fix the Espresso bug for constant and dontcare output. (cherry picked from commit 46b53320e9ec09fc26d63259f1821f4234640839) Co-authored-by: Jiuyang Liu <liu@jiuyang.me>
2022-01-19	util: add GrayCode (#2353) (#2354)	mergify[bot]
	(cherry picked from commit 91d7baa8e7162d736f46b6d4964b09016d2dd172) Co-authored-by: Kevin Laeufer <laeufer@cs.berkeley.edu>
2021-12-15	Refactor TruthTable to use Seq (#2217)	Jiuyang Liu
	This makes the resulting Verilog from decoding a TruthTable deterministic.
2021-08-30	SyncReadMem: fix bug with read(addr) and add some formal tests (#2092)	Kevin Laeufer

2021-08-25	replace custom model checker with chiseltest formal verify command (#2075)	Kevin Laeufer
	* replace custom model checker with chiseltest formal verify command * integration-tests can make use of chiseltest This is a compromise solution to avoid issues with binary compatibility breaking changes in chisel3. * ci: move integration tests into separate job * run integration tests only for one scala version * ci: install espresso for integration tests * Update build.sbt Co-authored-by: Jack Koenig <jack.koenig3@gmail.com> Co-authored-by: Jack Koenig <jack.koenig3@gmail.com>