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* Fix up Absolute value #abs
Defines #abs in Num
Implement #abs in UInt
Change #abs in SInt to return an SInt
Change #abs in FixedPoint to return a FixedPoint
Added a couple of tests
Add some scala style suppression to Bits so I can read code in IntelliJ
* Per review
Add tests that abs works for positive values
Added SInt and UInt tests for abs to new underpopulated IntegerMathSpec
Used fixed point literals in fixed points abs definition
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Retain un-deprecated SeqMem in compatibility mode, deprecate in chisel3.
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* Added vec IO tests for #104
* Added Vec test case for Reg of vecs
* Change Vec creation to check if gen is lit (and hence needs to be declared)
Fixes #104
* Fix tests (add IO())), Vec.fill()
* Fix deprecated usage.
* Add Binding IO() NPE fix so tests pass.
* Fix style - use space consistently.
* Fix style - use space consistently.
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Fix default suggested name of Module instances (now based on desired name
rather than actual assigned name).
Remove parent/child relationship from Namespace.
Previously, Module and Bundle namespaces were "children" of the Module
definition namespace. This could lead to collisions that would give unexpected
names for module instances or Bundle elements. In particular, otherwise
identical modules that instantiate other identical modules in such a way that
the instance cannot be named via reflection would not be deduplicated because
the names of the instances would collide with the names of the modules in the
Builder.globalNamespace.
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* Name propagation
* chiselName everywhere at best-effort level
* Better collision handling
* Allow recursing into inner anonymous functions
* Add for loop and anonymous inner function tests
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Record gives uses the power to create collections of heterogenous elements.
Bundle is a special case of Record that uses reflection to populate the
elements of the collection. Bundle also attempts to implement cloneType whereas
users of Record are required to supply one.
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* Make fromBits work with types other than UInt
* Oops, left in a println
* Add test for truncation/expansion
* Fix stuff that broke when FixedPoint fromBits PR was merged.
* Use .BP shorthand added in previous PR
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* Support for creating chisel annotations that are consumed by firrtl
Update annotation serialization in Driver
Add DiamondAnnotation Spec that illustrates how to do simple annotations
frontEnd must have dependency on firrtl
Add annotation method to Module
Circuit has extra optional parameter that is Seq of Annotations
In Builder add annotation buffer to DynamicContext to store annotations created in modules
Added explicit types on naming api methods to avoid type confusion
Because some names are not available until elaboration create intermediate ChiselAnnotation that
gets turned into a firrtl Annotation after elaboration
In execute pass firrtl text and annotation to firrtl are now passed in through optionManager, though
intermediate file .fir and .anno files are still created for inspection and/or later use
* Somehow missed ChiselAnnotation
* fixes for Jack's review of PR
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Fixes #388
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(#387)
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Get rid of some cruft exposed in #373
This also allows Bits.fromtInt(...) to be removed. Yay!
All old APIs (with some new restrictions, rocket still works fine) are preserved without deprecation in Chisel._, aside from the non-compile-time-checkable Map[] enum constructor which probably should have been deprecated during chisel2. The Map[] enums have been removed from chisel3._ without deprecation.
The new restriction is that nodeType (legacy API) may only be of UInt type with unspecified width. Note that Bits() creates a UInt, and if you can't control the enum values, it makes little sense to specify a bitwidth.
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Data.toUInt() doesn't exist.
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Remove modName from Module
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compatibility package object
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Also restrict black boxes to not allow hardware inside of them since it was
being silently dropped anyway.
Resolves #289
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Implemented by adding a Boolean to check for alternating invocations of object
Module.apply and the constructor of abstract class Module.
Fixes #192
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Add a Builder.exception() method for those cases where continuing is likely to mask the initial error.
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Prefix temporary names with underscores so Verilator won't trace them
Use verilator argument "--trace-underscore" if you want to trace these
signals
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defaultCompileOptions is convenient, but it frequently foils the
compatibility layer by providing strict defaults rather than passing
through the user's CompileOptions. This notably manifests for
chiselCloneType, which has different behavior for chisel3 and Chisel.
Ideally, we'd get rid of defaultCompileOptions within chisel3.core
and only supply it to people who import chisel3._ (attn. @ucbjrl).
That would statically prevent further regressions of this nature
within the core.
The change to Vec.truncateIndex seems extraneous, but I chose an
alternate implementation rather than requiring compileOptions in
another place.
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f1507aa7cec86ca8f5de13ddc96fd046370dfe1d triggers a rocket-chip
regression, because Chisel used to not preserve flippedness on
cloneType.
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fix SeqMem's read port creation
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No more need for e.g.
new Bundle {
def foo(dummy: Int): Data
}
as now you can write
new Bundle {
def foo: Data
}
This also removes code duplication with Module.
h/t @sdtwigg
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