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AgeCommit message (Expand)Author
2021-01-20remove 2.11 dedicated code. (#1744)Jiuyang Liu
2021-01-20Fix Mergify condition for labeling backports (#1742)Jack Koenig
2021-01-19Add when.cond for getting the current when condition (#1694)Jack Koenig
2021-01-15Merge pull request #1732 from chipsalliance/farewell_scala_211Jack Koenig
2021-01-15farewell Scala 2.11Jiuyang liu
2021-01-11Make `toTarget` fail if called on a Literal (or would otherwise not serialize...Megan Wachs
2021-01-06Update meeting url (#1716)Jiuyang Liu
2020-12-17Automate publishing of SNAPSHOTS with sbt-ci-release (#1706)Jack Koenig
2020-12-17Remove CircleCI (#1702)Jack Koenig
2020-12-17Bump SNAPSHOT and SNAPSHOT dependencies (#1701)Jack Koenig
2020-12-16Switch to using Github Actions CI (#1690)Jack Koenig
2020-12-08Make Maven show chisel3 as apache-2.0 (#1695)Chick Markley
2020-12-07(encore) Builder: use LazyLogging.logger.warn to print elaboration message (#...Jiuyang Liu
2020-12-01Fix RegInit of Bundle lits (#1688)Jack Koenig
2020-12-02readme: simplify sbt snippet and update to the latest stable release (#1686)Kevin Laeufer
2020-11-24Update some README links to chipsalliance (#1673)Jack Koenig
2020-11-16Improve source locators for switch statements. (#1669)Daniel Kasza
2020-11-11Add custom mdoc modifier for emitted Verilog (#1666)Jack Koenig
2020-11-11Ignore tests using System.setSecurityManager (#1661)Jack Koenig
2020-11-11Refine autonaming to have more intuitive behavior (#1660)Jack Koenig
2020-11-05For HasId.setRef, have first set win (with force override) (#1655)Jack Koenig
2020-11-03Remove Data.setRef assertion (#1654)Jack Koenig
2020-11-02SeqUtils asUInt endian-ness: hi/lo instead of right/left (#1647)John Ingalls
2020-11-02Bugfix - adding external modules was broken (#1649)Adam Izraelevitz
2020-10-30Fix bug where refs may not get set for Records (#1645)Jack Koenig
2020-10-27Fix broken links in docs (#1643)Adam Izraelevitz
2020-10-26Fix crosslinks in mdoc. Can't use md suffix (#1640)Adam Izraelevitz
2020-10-26Bugfix - module name collision for injecting aspect (#1635)Adam Izraelevitz
2020-10-26Added Force Name API (#1634)Adam Izraelevitz
2020-10-26Fixed broken link to type hierarchy diagram (#1611)PENGUINLIONG
2020-10-26Delete index.md (#1613)Adam Izraelevitz
2020-10-22Use Data refs for name prefixing with aggregate elements (#1616)Jack Koenig
2020-10-21Make `-e` option work with ChiselStage methods (#1630)Schuyler Eldridge
2020-10-19Change prefix stack to List[String] (#1617)Jack Koenig
2020-10-19Enable Cat of Zero Element Vec (#1623)Schuyler Eldridge
2020-10-14Provide user source locators in Builder.error errors (#1618)Jack Koenig
2020-10-13ExtModule's lacked support built in support for providing (#1154)Chick Markley
2020-10-12When prefixing with a data, eagly get local name (#1614)Jack Koenig
2020-10-12Update junit to 4.13.1 (#1612)Scala Steward
2020-10-11Add 3.4.x to Mergify (#1607)Jack Koenig
2020-10-05Move more docs (#1601)Adam Izraelevitz
2020-10-01Move Chisel3 to SPDX license conventions (#1604)Chick Markley
2020-09-24Fix broken mdoc (#1600)Adam Izraelevitz
2020-09-22Support using switch without importing SwitchContext (#1595)Jack Koenig
2020-09-15make parameters for util modules public (#1452)Albert Chen
2020-09-15Improve performance of ChiselPlugin (#1590)Jack Koenig
2020-09-14Documentation and minor plugin changes. (#1573)Adam Izraelevitz
2020-09-09Recursively generate one-hot multiplexers for aggregates (#1557)Jerry Zhao
2020-09-09Add new annotation for Chisel Circuit serialization (#1580)Jack Koenig
2020-09-09Fix load memory from file to work with binary (#1583)HappyQuark
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