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-rw-r--r--src/main/scala/Chisel/Driver.scala6
-rw-r--r--src/main/scala/Chisel/testers/BasicTester.scala2
-rw-r--r--src/main/scala/Chisel/testers/TesterDriver.scala6
-rw-r--r--src/test/scala/chiselTests/ComplexAssign.scala2
-rw-r--r--src/test/scala/chiselTests/GCD.scala2
-rw-r--r--src/test/scala/chiselTests/Harness.scala12
6 files changed, 17 insertions, 13 deletions
diff --git a/src/main/scala/Chisel/Driver.scala b/src/main/scala/Chisel/Driver.scala
index 64356b21..dd78ab8d 100644
--- a/src/main/scala/Chisel/Driver.scala
+++ b/src/main/scala/Chisel/Driver.scala
@@ -55,7 +55,7 @@ trait BackendCompilationUtilities {
"--Wno-fatal",
"--trace",
"-O2",
- "+define+TOP_TYPE=V"+prefix,
+ "+define+TOP_TYPE=V" + prefix,
"-CFLAGS", s"""-Wno-undefined-bool-conversion -O2 -DTOP_TYPE=V$prefix -include ${vH.toString}""",
"-Mdir", dir.toString,
"--exe", cppHarness.toString)
@@ -81,14 +81,14 @@ trait BackendCompilationUtilities {
object Driver extends FileSystemUtilities with BackendCompilationUtilities {
- /** Elaborates the Module specified in the gen function into a Circuit
+ /** Elaborates the Module specified in the gen function into a Circuit
*
* @param gen a function that creates a Module hierarchy
*
* @return the resulting Chisel IR in the form of a Circuit (TODO: Should be FIRRTL IR)
*/
def elaborate[T <: Module](gen: () => T): Circuit = Builder.build(Module(gen()))
-
+
def emit[T <: Module](gen: () => T): String = elaborate(gen).emit
def dumpFirrtl(ir: Circuit, optName: Option[File]): File = {
diff --git a/src/main/scala/Chisel/testers/BasicTester.scala b/src/main/scala/Chisel/testers/BasicTester.scala
index dbb269bb..398e49e7 100644
--- a/src/main/scala/Chisel/testers/BasicTester.scala
+++ b/src/main/scala/Chisel/testers/BasicTester.scala
@@ -11,5 +11,5 @@ class BasicTester extends Module {
io.done := Bool(false)
io.error := UInt(0)
- def popCount(n: Long) = n.toBinaryString.count(_=='1')
+ def popCount(n: Long): Int = n.toBinaryString.count(_=='1')
}
diff --git a/src/main/scala/Chisel/testers/TesterDriver.scala b/src/main/scala/Chisel/testers/TesterDriver.scala
index 657f7d37..d104782a 100644
--- a/src/main/scala/Chisel/testers/TesterDriver.scala
+++ b/src/main/scala/Chisel/testers/TesterDriver.scala
@@ -27,11 +27,13 @@ object TesterDriver extends BackendCompilationUtilities with FileSystemUtilities
Driver.dumpFirrtl(circuit, Some(new File(fname.toString + ".fir")))
// Use sys.Process to invoke a bunch of backend stuff, then run the resulting exe
- if(((new File(System.getProperty("user.dir") + "/src/main/resources/top.cpp") #> cppHarness) #&&
+ if (((new File(System.getProperty("user.dir") + "/src/main/resources/top.cpp") #> cppHarness) #&&
firrtlToVerilog(prefix, dir) #&&
verilogToCpp(prefix, dir, vDut, cppHarness, vH) #&&
cppToExe(prefix, dir)).! == 0) {
executeExpectingSuccess(prefix, dir)
- } else false
+ } else {
+ false
+ }
}
}
diff --git a/src/test/scala/chiselTests/ComplexAssign.scala b/src/test/scala/chiselTests/ComplexAssign.scala
index 64fc8bda..bbd3d6c2 100644
--- a/src/test/scala/chiselTests/ComplexAssign.scala
+++ b/src/test/scala/chiselTests/ComplexAssign.scala
@@ -41,7 +41,7 @@ class ComplexAssignTester(enList: List[Boolean], re: Int, im: Int) extends Basic
io.done := Bool(true); io.error := cnt
} .elsewhen(wrap) { io.done := Bool(true) }
}
-
+
class ComplexAssignSpec extends ChiselPropSpec {
property("All complex assignments should return the correct result") {
diff --git a/src/test/scala/chiselTests/GCD.scala b/src/test/scala/chiselTests/GCD.scala
index 27e147f4..529f9964 100644
--- a/src/test/scala/chiselTests/GCD.scala
+++ b/src/test/scala/chiselTests/GCD.scala
@@ -38,7 +38,7 @@ class GCDTester(a: Int, b: Int, z: Int) extends BasicTester {
}
class GCDSpec extends ChiselPropSpec {
-
+
//TODO: use generators and this function to make z's
def gcd(a: Int, b: Int): Int = if(b == 0) a else gcd(b, a%b)
diff --git a/src/test/scala/chiselTests/Harness.scala b/src/test/scala/chiselTests/Harness.scala
index 98ad3b11..31a219e4 100644
--- a/src/test/scala/chiselTests/Harness.scala
+++ b/src/test/scala/chiselTests/Harness.scala
@@ -1,13 +1,15 @@
+// See LICENSE for license details.
+
package chiselTests
import Chisel.testers.BasicTester
import org.scalatest._
import org.scalatest.prop._
import java.io.File
-class HarnessSpec extends ChiselPropSpec
+class HarnessSpec extends ChiselPropSpec
with Chisel.BackendCompilationUtilities {
- def makeTrivialVerilog = makeHarness((prefix: String) => s"""
+ def makeTrivialVerilog: (File => File) = makeHarness((prefix: String) => s"""
module ${prefix};
initial begin
$$display("$prefix!");
@@ -16,7 +18,7 @@ module ${prefix};
endmodule
""", ".v") _
- def makeFailingVerilog = makeHarness((prefix: String) => s"""
+ def makeFailingVerilog: (File => File) = makeHarness((prefix: String) => s"""
module $prefix;
initial begin
assert (1 == 0) else $$error("My specific, expected error message!");
@@ -26,7 +28,7 @@ module $prefix;
endmodule
""", ".v") _
- def makeCppHarness = makeHarness((prefix: String) => s"""
+ def makeCppHarness: (File => File) = makeHarness((prefix: String) => s"""
#include "V$prefix.h"
#include "verilated.h"
@@ -72,4 +74,4 @@ int main(int argc, char **argv, char **env) {
assert(!executeExpectingFailure(prefix, dir, "A string that doesn't match any test output"))
}
}
-
+