summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
Diffstat (limited to 'src')
-rw-r--r--src/main/scala/chisel3/package.scala12
1 files changed, 3 insertions, 9 deletions
diff --git a/src/main/scala/chisel3/package.scala b/src/main/scala/chisel3/package.scala
index a0264df4..fc23f41b 100644
--- a/src/main/scala/chisel3/package.scala
+++ b/src/main/scala/chisel3/package.scala
@@ -12,15 +12,9 @@ package object chisel3 {
import chisel3.internal.firrtl.Port
type Direction = chisel3.core.Direction
- object Input {
- def apply[T<:Data](target: T): T = chisel3.core.Input(target)
- }
- object Output {
- def apply[T<:Data](target: T): T = chisel3.core.Output(target)
- }
- object Flipped {
- def apply[T<:Data](target: T): T = chisel3.core.Flipped(target)
- }
+ val Input = chisel3.core.Input
+ val Output = chisel3.core.Output
+ val Flipped = chisel3.core.Flipped
type Data = chisel3.core.Data
val Wire = chisel3.core.Wire