7 files changed, 20 insertions, 16 deletions
diff --git a/src/main/scala/chisel3/aop/Select.scala b/src/main/scala/chisel3/aop/Select.scala
index e2689f39..b9ad808b 100644
--- a/src/main/scala/chisel3/aop/Select.scala
+++ b/src/main/scala/chisel3/aop/Select.scala
@@ -248,7 +248,7 @@ object Select {
         case other =>
       }
     })
-    predicatedConnects
+    predicatedConnects.toSeq
   }
 
   /** Selects all stop statements, and includes the predicates surrounding the stop statement
@@ -264,7 +264,7 @@ object Select {
         case other =>
       }
     })
-    stops
+    stops.toSeq
   }
 
   /** Selects all printf statements, and includes the predicates surrounding the printf statement
@@ -280,7 +280,7 @@ object Select {
         case other =>
       }
     })
-    printfs
+    printfs.toSeq
   }
 
   // Checks that a module has finished its construction
@@ -321,7 +321,7 @@ object Select {
     }
   } catch {
     case e: ChiselException => i.getOptionRef.get match {
-      case l: LitArg => l.num.intValue().toString
+      case l: LitArg => l.num.intValue.toString
     }
   }
 
diff --git a/src/main/scala/chisel3/aop/injecting/InjectingAspect.scala b/src/main/scala/chisel3/aop/injecting/InjectingAspect.scala
index 768680ed..c540fc83 100644
--- a/src/main/scala/chisel3/aop/injecting/InjectingAspect.scala
+++ b/src/main/scala/chisel3/aop/injecting/InjectingAspect.scala
@@ -89,7 +89,7 @@ abstract class InjectorAspect[T <: RawModule, M <: RawModule](
           Seq(other)
       }
 
-      InjectStatement(ModuleTarget(circuit, module.name), ir.Block(stmts), modules, annotations)
+      InjectStatement(ModuleTarget(circuit, module.name), ir.Block(stmts.toSeq), modules, annotations)
     }.toSeq
   }
 }
diff --git a/src/main/scala/chisel3/compatibility.scala b/src/main/scala/chisel3/compatibility.scala
index 3b9a3dcc..dde2321d 100644
--- a/src/main/scala/chisel3/compatibility.scala
+++ b/src/main/scala/chisel3/compatibility.scala
@@ -398,8 +398,8 @@ package object Chisel {
   }
 
   // Deprecated as of Chsiel3
-  @throws(classOf[Exception])
   object throwException {
+    @throws(classOf[Exception])
     def apply(s: String, t: Throwable = null): Nothing = {
       val xcpt = new Exception(s, t)
       throw xcpt
diff --git a/src/main/scala/chisel3/util/MixedVec.scala b/src/main/scala/chisel3/util/MixedVec.scala
index a632ec3a..14d6be38 100644
--- a/src/main/scala/chisel3/util/MixedVec.scala
+++ b/src/main/scala/chisel3/util/MixedVec.scala
@@ -91,6 +91,10 @@ final class MixedVec[T <: Data](private val eltsIn: Seq[T]) extends Record with
     eltsIn.foreach(e => requireIsChiselType(e))
   }
 
+  // In Scala 2.13, this is protected in IndexedSeq, must override as public because it's public in
+  // Record
+  override def className: String = "MixedVec"
+
   // Clone the inputs so that we have our own references.
   private val elts: IndexedSeq[T] = eltsIn.map(_.cloneTypeFull).toIndexedSeq
 
diff --git a/src/test/scala/chiselTests/ChiselSpec.scala b/src/test/scala/chiselTests/ChiselSpec.scala
index 9503089a..37c4a2b7 100644
--- a/src/test/scala/chiselTests/ChiselSpec.scala
+++ b/src/test/scala/chiselTests/ChiselSpec.scala
@@ -292,7 +292,7 @@ trait Utils {
     exceptions.collectFirst{ case a: A => a } match {
       case Some(a) => throw a
       case None => exceptions match {
-        case Nil    => Unit
+        case Nil    => ()
         case h :: t => throw h
       }
     }
diff --git a/src/test/scala/chiselTests/ExtModule.scala b/src/test/scala/chiselTests/ExtModule.scala
index 0c3a0633..161b6f5f 100644
--- a/src/test/scala/chiselTests/ExtModule.scala
+++ b/src/test/scala/chiselTests/ExtModule.scala
@@ -9,7 +9,7 @@ import chisel3.testers.{BasicTester, TesterDriver}
 
 // Avoid collisions with regular BlackBox tests by putting ExtModule blackboxes
 // in their own scope.
-package ExtModule {
+package extmoduletests {
 
   import chisel3.experimental.ExtModule
 
@@ -25,8 +25,8 @@ package ExtModule {
 }
 
 class ExtModuleTester extends BasicTester {
-  val blackBoxPos = Module(new ExtModule.BlackBoxInverter)
-  val blackBoxNeg = Module(new ExtModule.BlackBoxInverter)
+  val blackBoxPos = Module(new extmoduletests.BlackBoxInverter)
+  val blackBoxNeg = Module(new extmoduletests.BlackBoxInverter)
 
   blackBoxPos.in := 1.U
   blackBoxNeg.in := 0.U
@@ -42,10 +42,10 @@ class ExtModuleTester extends BasicTester {
   */
 
 class MultiExtModuleTester extends BasicTester {
-  val blackBoxInvPos = Module(new ExtModule.BlackBoxInverter)
-  val blackBoxInvNeg = Module(new ExtModule.BlackBoxInverter)
-  val blackBoxPassPos = Module(new ExtModule.BlackBoxPassthrough)
-  val blackBoxPassNeg = Module(new ExtModule.BlackBoxPassthrough)
+  val blackBoxInvPos = Module(new extmoduletests.BlackBoxInverter)
+  val blackBoxInvNeg = Module(new extmoduletests.BlackBoxInverter)
+  val blackBoxPassPos = Module(new extmoduletests.BlackBoxPassthrough)
+  val blackBoxPassNeg = Module(new extmoduletests.BlackBoxPassthrough)
 
   blackBoxInvPos.in := 1.U
   blackBoxInvNeg.in := 0.U
@@ -71,7 +71,7 @@ class ExtModuleSpec extends ChiselFlatSpec {
   "DataMirror.modulePorts" should "work with ExtModule" in {
     ChiselStage.elaborate(new Module {
       val io = IO(new Bundle { })
-      val m = Module(new ExtModule.BlackBoxPassthrough)
+      val m = Module(new extmoduletests.BlackBoxPassthrough)
       assert(DataMirror.modulePorts(m) == Seq(
           "in" -> m.in, "out" -> m.out))
     })
diff --git a/src/test/scala/examples/VendingMachineUtils.scala b/src/test/scala/examples/VendingMachineUtils.scala
index 131256f8..6847768a 100644
--- a/src/test/scala/examples/VendingMachineUtils.scala
+++ b/src/test/scala/examples/VendingMachineUtils.scala
@@ -34,6 +34,6 @@ object VendingMachineUtils {
         value += incValue
       }
     }
-    outputs
+    outputs.toSeq
   }
 }