diff options
Diffstat (limited to 'src/test/scala/chiselTests/util/random/PRNGSpec.scala')
| -rw-r--r-- | src/test/scala/chiselTests/util/random/PRNGSpec.scala | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/test/scala/chiselTests/util/random/PRNGSpec.scala b/src/test/scala/chiselTests/util/random/PRNGSpec.scala index 138a6ceb..341fb685 100644 --- a/src/test/scala/chiselTests/util/random/PRNGSpec.scala +++ b/src/test/scala/chiselTests/util/random/PRNGSpec.scala @@ -12,7 +12,7 @@ import chiselTests.ChiselFlatSpec class CyclePRNG(width: Int, seed: Option[BigInt], step: Int, updateSeed: Boolean) extends PRNG(width, seed, step, updateSeed) { - def delta(s: UInt): UInt = s ## s(width - 1) + def delta(s: Seq[Bool]): Seq[Bool] = s.last +: s.dropRight(1) } @@ -49,10 +49,10 @@ class PRNGUpdateSeedTest(updateSeed: Boolean, seed: BigInt, expected: BigInt) ex a.io.increment := true.B a.io.seed.valid := count === 2.U - a.io.seed.bits := seed.U + a.io.seed.bits := seed.U(a.width.W).asBools when (count === 3.U) { - assert(a.io.out === expected.U, "Output didn't match!") + assert(a.io.out.asUInt === expected.U, "Output didn't match!") } when (done) { |
