summaryrefslogtreecommitdiff
path: root/src/test/scala/chiselTests/BundleLiteralSpec.scala
diff options
context:
space:
mode:
Diffstat (limited to 'src/test/scala/chiselTests/BundleLiteralSpec.scala')
-rw-r--r--src/test/scala/chiselTests/BundleLiteralSpec.scala4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/test/scala/chiselTests/BundleLiteralSpec.scala b/src/test/scala/chiselTests/BundleLiteralSpec.scala
index 7d28660b..9db602ee 100644
--- a/src/test/scala/chiselTests/BundleLiteralSpec.scala
+++ b/src/test/scala/chiselTests/BundleLiteralSpec.scala
@@ -18,7 +18,7 @@ class BundleLiteralSpec extends ChiselFlatSpec {
import chisel3.core.BundleLitBinding
import chisel3.internal.firrtl.{ULit, Width}
// Full bundle literal constructor
- def Lit(aVal: UInt, bVal: Bool): MyBundle = {
+ def Lit(aVal: UInt, bVal: Bool): MyBundle = { // scalastyle:ignore method.name
val clone = cloneType
clone.selfBind(BundleLitBinding(Map(
clone.a -> litArgOfBits(aVal),
@@ -27,7 +27,7 @@ class BundleLiteralSpec extends ChiselFlatSpec {
clone
}
// Partial bundle literal constructor
- def Lit(aVal: UInt): MyBundle = {
+ def Lit(aVal: UInt): MyBundle = { // scalastyle:ignore method.name
val clone = cloneType
clone.selfBind(BundleLitBinding(Map(
clone.a -> litArgOfBits(aVal)