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-rw-r--r--src/main/scala/Chisel/BitPat.scala3
-rw-r--r--src/main/scala/Chisel/Bits.scala4
-rw-r--r--src/main/scala/Chisel/Data.scala11
3 files changed, 16 insertions, 2 deletions
diff --git a/src/main/scala/Chisel/BitPat.scala b/src/main/scala/Chisel/BitPat.scala
index b4138992..a1bf1985 100644
--- a/src/main/scala/Chisel/BitPat.scala
+++ b/src/main/scala/Chisel/BitPat.scala
@@ -75,5 +75,6 @@ object BitPat {
sealed class BitPat(val value: BigInt, val mask: BigInt, width: Int) {
def getWidth: Int = width
def === (other: UInt): Bool = UInt(value) === (other & UInt(mask))
- def != (other: UInt): Bool = !(this === other)
+ def =/= (other: UInt): Bool = !(this === other)
+ def != (other: UInt): Bool = this =/= other
}
diff --git a/src/main/scala/Chisel/Bits.scala b/src/main/scala/Chisel/Bits.scala
index 7505c102..57d88244 100644
--- a/src/main/scala/Chisel/Bits.scala
+++ b/src/main/scala/Chisel/Bits.scala
@@ -321,6 +321,7 @@ sealed class UInt private[Chisel] (dir: Direction, width: Width, lit: Option[ULi
def === (that: BitPat): Bool = that === this
def != (that: BitPat): Bool = that != this
+ def =/= (that: BitPat): Bool = that =/= this
/** Returns this UInt as a [[SInt]] with an additional zero in the MSB.
*/
@@ -538,6 +539,9 @@ object Mux {
// This returns an lvalue, which it most definitely should not
private def doWhen[T <: Data](cond: Bool, con: T, alt: T): T = {
require(con.getClass == alt.getClass, s"can't Mux between ${con.getClass} and ${alt.getClass}")
+ for ((c, a) <- con.flatten zip alt.flatten)
+ require(c.width == a.width, "can't Mux between aggregates of different width")
+
val res = Wire(t = alt.cloneTypeWidth(con.width max alt.width), init = alt)
when (cond) { res := con }
res
diff --git a/src/main/scala/Chisel/Data.scala b/src/main/scala/Chisel/Data.scala
index c72c7dfc..7927db86 100644
--- a/src/main/scala/Chisel/Data.scala
+++ b/src/main/scala/Chisel/Data.scala
@@ -104,7 +104,16 @@ abstract class Data(dirArg: Direction) extends HasId {
}
object Wire {
- def apply[T <: Data](t: T = null, init: T = null): T = {
+ def apply[T <: Data](t: T): T =
+ makeWire(t, null.asInstanceOf[T])
+
+ def apply[T <: Data](dummy: Int = 0, init: T): T =
+ makeWire(null.asInstanceOf[T], init)
+
+ def apply[T <: Data](t: T, init: T): T =
+ makeWire(t, init)
+
+ private def makeWire[T <: Data](t: T, init: T): T = {
val x = Reg.makeType(t, null.asInstanceOf[T], init)
pushCommand(DefWire(x))
if (init != null) {