summaryrefslogtreecommitdiff
path: root/src/main/scala/chisel3/util/Valid.scala
diff options
context:
space:
mode:
Diffstat (limited to 'src/main/scala/chisel3/util/Valid.scala')
-rw-r--r--src/main/scala/chisel3/util/Valid.scala6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/main/scala/chisel3/util/Valid.scala b/src/main/scala/chisel3/util/Valid.scala
index 49a6f515..0229b7f8 100644
--- a/src/main/scala/chisel3/util/Valid.scala
+++ b/src/main/scala/chisel3/util/Valid.scala
@@ -52,10 +52,12 @@ object Pipe
class Pipe[T <: Data](gen: T, latency: Int = 1) extends Module
{
- val io = IO(new Bundle {
+ class PipeIO extends Bundle {
val enq = Input(Valid(gen))
val deq = Output(Valid(gen))
- })
+ }
+
+ val io = IO(new PipeIO)
io.deq <> Pipe(io.enq, latency)
}