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-rw-r--r--src/main/scala/chisel3/Driver.scala12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/main/scala/chisel3/Driver.scala b/src/main/scala/chisel3/Driver.scala
index ab51ad25..646702c3 100644
--- a/src/main/scala/chisel3/Driver.scala
+++ b/src/main/scala/chisel3/Driver.scala
@@ -6,10 +6,13 @@ import chisel3.internal.firrtl.Emitter
import scala.sys.process._
import java.io._
+import net.jcazevedo.moultingyaml._
import internal.firrtl._
import firrtl._
+import _root_.firrtl.annotations.AnnotationYamlProtocol._
+
/**
* The Driver provides methods to invoke the chisel3 compiler and the firrtl compiler.
* By default firrtl is automatically run after chisel. an [[ExecutionOptionsManager]]
@@ -239,6 +242,15 @@ object Driver extends BackendCompilationUtilities {
w.write(firrtlString)
w.close()
+ val annotationFile = new File(optionsManager.getBuildFileName("anno"))
+ val af = new FileWriter(annotationFile)
+ af.write(circuit.annotations.toArray.toYaml.prettyPrint)
+ af.close()
+
+ /* This passes the firrtl source and annotations directly to firrtl */
+ optionsManager.firrtlOptions = optionsManager.firrtlOptions.copy(
+ firrtlSource = Some(firrtlString), annotations = circuit.annotations.toList)
+
val firrtlExecutionResult = if(chiselOptions.runFirrtlCompiler) {
Some(firrtl.Driver.execute(optionsManager))
}