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Diffstat (limited to 'src/main/scala/Chisel/ir')
| -rw-r--r-- | src/main/scala/Chisel/ir/IR.scala | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/main/scala/Chisel/ir/IR.scala b/src/main/scala/Chisel/ir/IR.scala index e25d3f56..106ad20c 100644 --- a/src/main/scala/Chisel/ir/IR.scala +++ b/src/main/scala/Chisel/ir/IR.scala @@ -152,6 +152,6 @@ case class ConnectInit(loc: Node, exp: Arg) extends Command case class Component(id: Module, name: String, ports: Seq[Port], commands: Seq[Command]) extends Arg case class Port(id: Data, dir: Direction) -case class Circuit(name: String, components: Seq[Component], refMap: RefMap, parameterDump: ParameterDump) { +case class Circuit(name: String, components: Seq[Component], refMap: RefMap) { def emit: String = new Emitter(this).toString } |