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-rw-r--r--src/main/scala/Chisel/internal/firrtl/IR.scala2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/main/scala/Chisel/internal/firrtl/IR.scala b/src/main/scala/Chisel/internal/firrtl/IR.scala
index 8a937419..beb32e6c 100644
--- a/src/main/scala/Chisel/internal/firrtl/IR.scala
+++ b/src/main/scala/Chisel/internal/firrtl/IR.scala
@@ -181,6 +181,6 @@ case class Printf(clk: Arg, formatIn: String, ids: Seq[Arg]) extends Command {
}
}
-case class Circuit(name: String, components: Seq[Component], refMap: RefMap) {
+case class Circuit(name: String, components: Seq[Component]) {
def emit: String = new Emitter(this).toString
}