diff options
| -rw-r--r-- | .github/workflows/test.yml | 3 | ||||
| -rw-r--r-- | src/test/scala/chiselTests/ChiselSpec.scala | 5 | ||||
| -rw-r--r-- | src/test/scala/chiselTests/Vec.scala | 4 |
3 files changed, 9 insertions, 3 deletions
diff --git a/.github/workflows/test.yml b/.github/workflows/test.yml index 9ace173e..139d5908 100644 --- a/.github/workflows/test.yml +++ b/.github/workflows/test.yml @@ -50,6 +50,9 @@ jobs: - name: Documentation (Scala 2.12 only) if: startsWith(matrix.scala, '2.12') run: sbt ++${{ matrix.scala }} docs/mdoc unidoc + - name: Use Treadle for Pull Requests + if: github.event_name == 'pull_request' + run: echo "CHISEL3_CI_USE_TREADLE=1" >> $GITHUB_ENV - name: Test run: sbt ++${{ matrix.scala }} test - name: Binary compatibility diff --git a/src/test/scala/chiselTests/ChiselSpec.scala b/src/test/scala/chiselTests/ChiselSpec.scala index 6f560b94..e00afcf6 100644 --- a/src/test/scala/chiselTests/ChiselSpec.scala +++ b/src/test/scala/chiselTests/ChiselSpec.scala @@ -38,7 +38,10 @@ trait ChiselRunners extends Assertions with BackendCompilationUtilities { annotations: AnnotationSeq = Seq() ): Boolean = { // Change this to enable Treadle as a backend - val defaultBackend = chisel3.testers.TesterDriver.defaultBackend + val defaultBackend = { + val useTreadle = sys.env.get("CHISEL3_CI_USE_TREADLE").isDefined + if (useTreadle) chisel3.testers.TreadleBackend else chisel3.testers.TesterDriver.defaultBackend + } val hasBackend = TestUtils.containsBackend(annotations) val annos: Seq[Annotation] = if (hasBackend) annotations else defaultBackend +: annotations TesterDriver.execute(() => t, additionalVResources, annos) diff --git a/src/test/scala/chiselTests/Vec.scala b/src/test/scala/chiselTests/Vec.scala index 02743187..4a871890 100644 --- a/src/test/scala/chiselTests/Vec.scala +++ b/src/test/scala/chiselTests/Vec.scala @@ -6,7 +6,7 @@ import org.scalacheck._ import chisel3._ import chisel3.stage.ChiselStage -import chisel3.testers.BasicTester +import chisel3.testers.{BasicTester, TesterDriver} import chisel3.util._ import org.scalacheck.Shrink import scala.annotation.tailrec @@ -456,7 +456,7 @@ class VecSpec extends ChiselPropSpec with Utils { } property("Infering widths on huge Vecs should not cause a stack overflow") { - assertTesterPasses { new HugeVecTester(10000) } + assertTesterPasses(new HugeVecTester(10000), annotations = TesterDriver.verilatorOnly) } property("A Reg of a Vec of a single 1 bit element should compile and work") { |