diff options
| -rw-r--r-- | chiselFrontend/src/main/scala/chisel3/core/Data.scala | 9 | ||||
| -rw-r--r-- | src/main/scala/chisel3/package.scala | 4 | ||||
| -rw-r--r-- | src/test/scala/chiselTests/WireSpec.scala | 20 |
3 files changed, 32 insertions, 1 deletions
diff --git a/chiselFrontend/src/main/scala/chisel3/core/Data.scala b/chiselFrontend/src/main/scala/chisel3/core/Data.scala index db99d6b3..19adf01b 100644 --- a/chiselFrontend/src/main/scala/chisel3/core/Data.scala +++ b/chiselFrontend/src/main/scala/chisel3/core/Data.scala @@ -451,13 +451,20 @@ object WireInit { apply(model, init) } - def apply[T <: Data](t: T, init: T)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): T = { + private def applyImpl[T <: Data](t: T, init: Data)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): T = { implicit val noSourceInfo = UnlocatableSourceInfo val x = Wire(t) requireIsHardware(init, "wire initializer") x := init x } + + def apply[T <: Data](t: T, init: T)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): T = { + applyImpl(t, init) + } + def apply[T <: Data](t: T, init: DontCare.type)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): T = { + applyImpl(t, init) + } } /** RHS (source) for Invalidate API. diff --git a/src/main/scala/chisel3/package.scala b/src/main/scala/chisel3/package.scala index f31b4015..a502ef2d 100644 --- a/src/main/scala/chisel3/package.scala +++ b/src/main/scala/chisel3/package.scala @@ -32,6 +32,10 @@ package object chisel3 { // scalastyle:ignore package.object.name @deprecated("Wire(t, init) is deprecated, use WireInit(t, init) instead", "chisel3") def apply[T <: Data](t: T, init: T)(implicit compileOptions: CompileOptions): T = chisel3.core.WireInit(t, init) + + @deprecated("Wire(t, init) is deprecated, use WireInit(t, init) instead", "chisel3") + def apply[T <: Data](t: T, init: DontCare.type)(implicit compileOptions: CompileOptions): T = + chisel3.core.WireInit(t, init) } val WireInit = chisel3.core.WireInit diff --git a/src/test/scala/chiselTests/WireSpec.scala b/src/test/scala/chiselTests/WireSpec.scala new file mode 100644 index 00000000..051880ee --- /dev/null +++ b/src/test/scala/chiselTests/WireSpec.scala @@ -0,0 +1,20 @@ +// See LICENSE for license details. + +package chiselTests + +import chisel3._ + +class WireSpec extends ChiselFlatSpec { + "WireInit.apply" should "work" in { + assertCompiles("WireInit(UInt(4.W), 2.U)") + } + it should "allow DontCare" in { + assertCompiles("WireInit(UInt(4.W), DontCare)") + } + it should "not allow DontCare to affect type inference" in { + assertCompiles("val x: UInt = WireInit(UInt(4.W), DontCare)") + } + it should "not allow init argument to affect type inference" in { + assertDoesNotCompile("val x: UInt = WireInit(UInt(4.W), 2.S)") + } +} |
