3 files changed, 45 insertions, 4 deletions
diff --git a/AbstractModule.scala b/AbstractModule.scala
index 2c2574ad..10aca713 100644
--- a/AbstractModule.scala
+++ b/AbstractModule.scala
@@ -2,15 +2,32 @@ package chiselTests
 
 import chisel3._
 import chisel3.stage.ChiselStage
+import chisel3.MetaConnect._
+
+
+object TypeArithmetic {
+  implicit val f1: UInt => UInt => UInt = (a: UInt) => (b: UInt) => Mux(a > b, a, b)
+  implicit val f2: SomeTypeContainer => Unit => SomeTypeContainer = (a: SomeTypeContainer) => (b: Unit) => a
+}
+
+case class SomeTypeContainer(w: Int) extends UInt(w.W)
 
 class AbstractModule[T <: Data](params: T) extends Module[T] {
   val node = IO(params)
 }
 
 class AbstractModuleContainer extends Module {
-  val mod1 = Module(new AbstractModule[UInt](Input(UInt(0.W))))
-  val mod2 = Module(new AbstractModule[UInt](Output(UInt(0.W))))
-  mod2.node := mod1.node
+  val mod1 = Module(new AbstractModule[UInt](Input(UInt(4.W))))
+  val mod2 = Module(new AbstractModule[UInt](Output(UInt(8.W))))
+
+  val tc = SomeTypeContainer(16)
+  val mod3 = Module(new AbstractModule[tc.type](Output(tc)))
+
+  import TypeArithmetic._
+  mod3.node.makeConnection(mod1.node.makeConnection(mod2.node))
+
+  // goal is to get this to work:
+  // mod1.node := mod2.node := mod3.node
 }
 
 object main {
diff --git a/core/src/main/scala/chisel3/Bits.scala b/core/src/main/scala/chisel3/Bits.scala
index 70704e01..65c5cedf 100644
--- a/core/src/main/scala/chisel3/Bits.scala
+++ b/core/src/main/scala/chisel3/Bits.scala
@@ -453,7 +453,7 @@ sealed abstract class Bits(private[chisel3] val width: Width) extends Element wi
   * @define expandingWidth @note The width of the returned $coll is `width of this` + `1`.
   * @define constantWidth  @note The width of the returned $coll is unchanged, i.e., `width of this`.
   */
-sealed class UInt private[chisel3] (width: Width) extends Bits(width) with Num[UInt] {
+class UInt (width: Width) extends Bits(width) with Num[UInt] {
   override def toString: String = {
     litOption match {
       case Some(value) => s"UInt$width($value)"
diff --git a/core/src/main/scala/chisel3/MetaConnect.scala b/core/src/main/scala/chisel3/MetaConnect.scala
new file mode 100644
index 00000000..ebdff5f8
--- /dev/null
+++ b/core/src/main/scala/chisel3/MetaConnect.scala
@@ -0,0 +1,24 @@
+package chisel3
+
+object MetaConnect {
+  implicit class Connection[A](that: A) {
+    def makeConnection[B](me: B)(implicit f: A => B => A): Unit = {
+      println(me, that)
+      (me, that) match {
+        case (a: Data, b: Data) => {
+          if (a == b) {
+            a.connect(b)
+          }
+          else {
+
+          }
+        }
+        case (_, _) => 
+      }
+    }
+    // def makeConnection[B](me: B): Unit = {
+
+    // }
+    // def :=(a: Data, b: Data) = a.connect(b)
+  }
+}