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authorducky2016-05-27 13:24:36 -0700
committerducky2016-06-08 16:22:27 -0700
commit881ac3cb3a9da0c7827a161238468df4727996f0 (patch)
tree865b929b176ab1fd2c08fb4b7a083cdc2d132820 /src/test/scala/chiselTests/Vec.scala
parent671117f3332ac10d1e7c5cc4f4cb5278f72ed6ab (diff)
Move utils into utils
Diffstat (limited to 'src/test/scala/chiselTests/Vec.scala')
-rw-r--r--src/test/scala/chiselTests/Vec.scala4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/test/scala/chiselTests/Vec.scala b/src/test/scala/chiselTests/Vec.scala
index e35c765e..35a0c8bc 100644
--- a/src/test/scala/chiselTests/Vec.scala
+++ b/src/test/scala/chiselTests/Vec.scala
@@ -2,10 +2,12 @@
package chiselTests
-import chisel._
import org.scalatest._
import org.scalatest.prop._
+
+import chisel._
import chisel.testers.BasicTester
+import chisel.util._
class ValueTester(w: Int, values: List[Int]) extends BasicTester {
val v = Vec(values.map(UInt(_, width = w))) // TODO: does this need a Wire? Why no error?