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authorducky2016-11-17 13:01:03 -0800
committerducky2016-11-21 13:31:12 -0800
commit54d3f8dc054e55dfbd01d1aa034169a3dabe89f2 (patch)
tree7f6f9de04de6eb08878ac46be339fefc2a71395f /src/test/scala/chiselTests/SIntOps.scala
parentcd904da0aa0e96ba679906a3ee5dbdc068eace48 (diff)
Restyle a lot of test code, mainly with regex
Diffstat (limited to 'src/test/scala/chiselTests/SIntOps.scala')
-rw-r--r--src/test/scala/chiselTests/SIntOps.scala26
1 files changed, 13 insertions, 13 deletions
diff --git a/src/test/scala/chiselTests/SIntOps.scala b/src/test/scala/chiselTests/SIntOps.scala
index 392c4803..900eb074 100644
--- a/src/test/scala/chiselTests/SIntOps.scala
+++ b/src/test/scala/chiselTests/SIntOps.scala
@@ -7,22 +7,22 @@ import chisel3.testers.BasicTester
class SIntOps extends Module {
val io = IO(new Bundle {
- val a = Input(SInt.width(16))
- val b = Input(SInt.width(16))
- val addout = Output(SInt.width(16))
- val subout = Output(SInt.width(16))
- val timesout = Output(SInt.width(16))
- val divout = Output(SInt.width(16))
- val modout = Output(SInt.width(16))
- val lshiftout = Output(SInt.width(16))
- val rshiftout = Output(SInt.width(16))
+ val a = Input(SInt(16.W))
+ val b = Input(SInt(16.W))
+ val addout = Output(SInt(16.W))
+ val subout = Output(SInt(16.W))
+ val timesout = Output(SInt(16.W))
+ val divout = Output(SInt(16.W))
+ val modout = Output(SInt(16.W))
+ val lshiftout = Output(SInt(16.W))
+ val rshiftout = Output(SInt(16.W))
val lessout = Output(Bool())
val greatout = Output(Bool())
val eqout = Output(Bool())
val noteqout = Output(Bool())
val lesseqout = Output(Bool())
val greateqout = Output(Bool())
- val negout = Output(SInt.width(16))
+ val negout = Output(SInt(16.W))
})
val a = io.a
@@ -32,9 +32,9 @@ class SIntOps extends Module {
io.subout := a -% b
// TODO:
//io.timesout := (a * b)(15, 0)
- //io.divout := a / Mux(b === SInt(0), SInt(1), b)
+ //io.divout := a / Mux(b === 0.S, 1.S, b)
//io.divout := (a / b)(15, 0)
- //io.modout := SInt(0)
+ //io.modout := 0.S
//io.lshiftout := (a << 12)(15, 0) // (a << ub(3, 0))(15, 0).toSInt
io.rshiftout := (a >> 8) // (a >> ub).toSInt
io.lessout := a < b
@@ -44,7 +44,7 @@ class SIntOps extends Module {
io.lesseqout := a <= b
io.greateqout := a >= b
// io.negout := -a(15, 0).toSInt
- io.negout := (SInt(0) -% a)
+ io.negout := (0.S -% a)
}
/*