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authorJim Lawson2016-09-30 12:13:58 -0700
committerGitHub2016-09-30 12:13:58 -0700
commitdb25e8180a53fb8f4912fd37b7a613e15a01564f (patch)
tree8bb5597746002ac98641f394cee4c94e1d154aff /src/test/scala/chiselTests/MulLookup.scala
parent785620b1403d827986bf60c2a001d8d6f71eed72 (diff)
parent6edbdf279257d656b5eac38d9de8645a068611bf (diff)
Merge pull request #265 from ucb-bar/gsdt
Gsdt - Fixup to Chisel connections and direction - PR 200 revisited.
Diffstat (limited to 'src/test/scala/chiselTests/MulLookup.scala')
-rw-r--r--src/test/scala/chiselTests/MulLookup.scala10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/test/scala/chiselTests/MulLookup.scala b/src/test/scala/chiselTests/MulLookup.scala
index 831e323f..26ee4e03 100644
--- a/src/test/scala/chiselTests/MulLookup.scala
+++ b/src/test/scala/chiselTests/MulLookup.scala
@@ -8,11 +8,11 @@ import org.scalatest.prop._
import chisel3.testers.BasicTester
class MulLookup(val w: Int) extends Module {
- val io = new Bundle {
- val x = UInt(INPUT, w)
- val y = UInt(INPUT, w)
- val z = UInt(OUTPUT, 2 * w)
- }
+ val io = IO(new Bundle {
+ val x = Input(UInt.width(w))
+ val y = Input(UInt.width(w))
+ val z = Output(UInt.width(2 * w))
+ })
val tbl = Vec(
for {
i <- 0 until 1 << w