Merge pull request #372 from ucb-bar/onetrueliteral

Standardize the One True Way of specifying literals

1 files changed, 2 insertions, 2 deletions

diff --git a/src/test/scala/chiselTests/LFSR16.scala b/src/test/scala/chiselTests/LFSR16.scala
index b13b67e3..09beddb9 100644
--- a/src/test/scala/chiselTests/LFSR16.scala
+++ b/src/test/scala/chiselTests/LFSR16.scala
@@ -9,9 +9,9 @@ import chisel3.util._
 class LFSR16 extends Module {
   val io = IO(new Bundle {
     val inc = Input(Bool())
-    val out = Output(UInt.width(16))
+    val out = Output(UInt(16.W))
   })
-  val res = Reg(init = UInt(1, 16))
+  val res = Reg(init = 1.U(16.W))
   when (io.inc) {
     val nxt_res = Cat(res(0)^res(2)^res(3)^res(5), res(15,1))
     res := nxt_res