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authorRichard Lin2016-11-21 13:44:26 -0800
committerGitHub2016-11-21 13:44:26 -0800
commit3b4755716a74d4711efa3ce6799742479e17e80b (patch)
tree56652eaa478d5dfd8cddfbe2795c0123d39d230d /src/test/scala/chiselTests/IOCompatibility.scala
parentcd6eb41275381a4399a8a88c886110d276bb805c (diff)
parent81e5d00d18a5ba9ae33c10219a270148002fc672 (diff)
Merge pull request #372 from ucb-bar/onetrueliteral
Standardize the One True Way of specifying literals
Diffstat (limited to 'src/test/scala/chiselTests/IOCompatibility.scala')
-rw-r--r--src/test/scala/chiselTests/IOCompatibility.scala10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/test/scala/chiselTests/IOCompatibility.scala b/src/test/scala/chiselTests/IOCompatibility.scala
index 552fe776..521e895d 100644
--- a/src/test/scala/chiselTests/IOCompatibility.scala
+++ b/src/test/scala/chiselTests/IOCompatibility.scala
@@ -7,19 +7,19 @@ import chisel3.core.Binding.BindingException
import org.scalatest._
class IOCSimpleIO extends Bundle {
- val in = Input(UInt(width=32))
- val out = Output(UInt(width=32))
+ val in = Input(UInt(32.W))
+ val out = Output(UInt(32.W))
}
class IOCPlusOne extends Module {
val io = IO(new IOCSimpleIO)
- io.out := io.in + UInt(1)
+ io.out := io.in + 1.U
}
class IOCModuleVec(val n: Int) extends Module {
val io = IO(new Bundle {
- val ins = Vec(n, Input(UInt(width=32)))
- val outs = Vec(n, Output(UInt(width=32)))
+ val ins = Vec(n, Input(UInt(32.W)))
+ val outs = Vec(n, Output(UInt(32.W)))
})
val pluses = Vec.fill(n){ Module(new IOCPlusOne).io }
for (i <- 0 until n) {