Merge branch 'master' into buildinfo

1 files changed, 15 insertions, 1 deletions

diff --git a/src/test/scala/chiselTests/IOCompatibility.scala b/src/test/scala/chiselTests/IOCompatibility.scala
index 7bf3dded..552fe776 100644
--- a/src/test/scala/chiselTests/IOCompatibility.scala
+++ b/src/test/scala/chiselTests/IOCompatibility.scala
@@ -3,6 +3,8 @@
 package chiselTests
 
 import chisel3._
+import chisel3.core.Binding.BindingException
+import org.scalatest._
 
 class IOCSimpleIO extends Bundle {
   val in  = Input(UInt(width=32))
@@ -33,7 +35,7 @@ class IOCModuleWire extends Module {
   io.out := inc.out
 }
 
-class IOCompatibilitySpec extends ChiselPropSpec {
+class IOCompatibilitySpec extends ChiselPropSpec with Matchers {
 
   property("IOCModuleVec should elaborate") {
     elaborate { new IOCModuleVec(2) }
@@ -42,4 +44,16 @@ class IOCompatibilitySpec extends ChiselPropSpec {
   property("IOCModuleWire should elaborate") {
     elaborate { new IOCModuleWire }
   }
+
+
+  class IOUnwrapped extends Module {
+    val io = new IOCSimpleIO
+    io.out := io.in
+  }
+
+  property("Unwrapped IO should generate an exception") {
+    a [BindingException] should be thrownBy {
+      elaborate(new IOUnwrapped)
+    }
+  }
 }