summaryrefslogtreecommitdiff
path: root/src/test/scala/ChiselTests/Tbl.scala
diff options
context:
space:
mode:
authorJim Lawson2015-07-24 17:17:01 -0700
committerJim Lawson2015-07-24 17:17:01 -0700
commite73450165c59d68b524689a7169e03140a41a1c5 (patch)
treeb7236f80d9abf60775ecbcefe6f7ca25557dce73 /src/test/scala/ChiselTests/Tbl.scala
parent94893bad972ded686a2c68dd334aa40b92e3b85d (diff)
parent3976145bb8c7595ad0f0a7fbb4ccbbd3030d8873 (diff)
Merge pull request #1 from ucb-bar/packagedir
Packagedir
Diffstat (limited to 'src/test/scala/ChiselTests/Tbl.scala')
-rw-r--r--src/test/scala/ChiselTests/Tbl.scala31
1 files changed, 31 insertions, 0 deletions
diff --git a/src/test/scala/ChiselTests/Tbl.scala b/src/test/scala/ChiselTests/Tbl.scala
new file mode 100644
index 00000000..390f5882
--- /dev/null
+++ b/src/test/scala/ChiselTests/Tbl.scala
@@ -0,0 +1,31 @@
+package ChiselTests
+import Chisel._
+
+class Tbl extends Module {
+ val io = new Bundle {
+ val i = Bits(INPUT, 16)
+ val we = Bool(INPUT)
+ val d = Bits(INPUT, 16)
+ val o = Bits(OUTPUT, 16)
+ }
+ val m = Mem(Bits(width = 10), 256)
+ io.o := Bits(0)
+ when (io.we) { m(io.i) := io.d(9, 0) }
+ .otherwise { io.o := m(io.i) }
+}
+
+class TblTester(c: Tbl) extends Tester(c) {
+ val m = Array.fill(1 << 16){ 0 }
+ for (t <- 0 until 16) {
+ val i = rnd.nextInt(1 << 16)
+ val d = rnd.nextInt(1 << 16)
+ val we = rnd.nextInt(2)
+ poke(c.io.i, i)
+ poke(c.io.we, we)
+ poke(c.io.d, d)
+ step(1)
+ expect(c.io.o, if (we == 1) 0 else m(i))
+ if (we == 1)
+ m(i) = d
+ }
+}