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| author | Jim Lawson | 2015-07-24 17:17:01 -0700 |
|---|---|---|
| committer | Jim Lawson | 2015-07-24 17:17:01 -0700 |
| commit | e73450165c59d68b524689a7169e03140a41a1c5 (patch) | |
| tree | b7236f80d9abf60775ecbcefe6f7ca25557dce73 /src/test/scala/ChiselTests/Rom.scala | |
| parent | 94893bad972ded686a2c68dd334aa40b92e3b85d (diff) | |
| parent | 3976145bb8c7595ad0f0a7fbb4ccbbd3030d8873 (diff) | |
Merge pull request #1 from ucb-bar/packagedir
Packagedir
Diffstat (limited to 'src/test/scala/ChiselTests/Rom.scala')
| -rw-r--r-- | src/test/scala/ChiselTests/Rom.scala | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/src/test/scala/ChiselTests/Rom.scala b/src/test/scala/ChiselTests/Rom.scala new file mode 100644 index 00000000..7c7eb1ac --- /dev/null +++ b/src/test/scala/ChiselTests/Rom.scala @@ -0,0 +1,23 @@ +package ChiselTests +import Chisel._ + +class Rom extends Module { + val io = new Bundle { + val addr = UInt(INPUT, 4) + val out = UInt(OUTPUT, 5) + } + val r = Vec(Range(0, 1 << 4).map(i => UInt(i * 2, width = 5))) + io.out := r(io.addr) +} + + +class RomTester(c: Rom) extends Tester(c) { + val r = Array.tabulate(1 << 4){ i => i * 2} + for (i <- 0 until 10) { + val a = rnd.nextInt(1 << 4) + poke(c.io.addr, a) + step(1) + expect(c.io.out, r(a)) + } + +} |
