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authorJim Lawson2015-07-24 17:17:01 -0700
committerJim Lawson2015-07-24 17:17:01 -0700
commite73450165c59d68b524689a7169e03140a41a1c5 (patch)
treeb7236f80d9abf60775ecbcefe6f7ca25557dce73 /src/test/scala/ChiselTests/BundleWire.scala
parent94893bad972ded686a2c68dd334aa40b92e3b85d (diff)
parent3976145bb8c7595ad0f0a7fbb4ccbbd3030d8873 (diff)
Merge pull request #1 from ucb-bar/packagedir
Packagedir
Diffstat (limited to 'src/test/scala/ChiselTests/BundleWire.scala')
-rw-r--r--src/test/scala/ChiselTests/BundleWire.scala34
1 files changed, 34 insertions, 0 deletions
diff --git a/src/test/scala/ChiselTests/BundleWire.scala b/src/test/scala/ChiselTests/BundleWire.scala
new file mode 100644
index 00000000..50bb60e2
--- /dev/null
+++ b/src/test/scala/ChiselTests/BundleWire.scala
@@ -0,0 +1,34 @@
+package ChiselTests
+import Chisel._
+
+class Coord extends Bundle {
+ val x = UInt(width = 32)
+ val y = UInt(width = 32)
+}
+
+class BundleWire extends Module {
+ val io = new Bundle {
+ val in = (new Coord).asInput
+ val outs = Vec((new Coord).asOutput, 4)
+ }
+ val coords = Wire(Vec(new Coord, 4))
+ for (i <- 0 until 4) {
+ coords(i) := io.in
+ io.outs(i) := coords(i)
+ }
+}
+
+class BundleWireTester(c: BundleWire) extends Tester(c) {
+ for (t <- 0 until 4) {
+ val test_in_x = rnd.nextInt(256)
+ val test_in_y = rnd.nextInt(256)
+ poke(c.io.in.x, test_in_x)
+ poke(c.io.in.y, test_in_y)
+ step(1)
+ for (i <- 0 until 4) {
+ expect(c.io.outs(i).x, test_in_x)
+ expect(c.io.outs(i).y, test_in_y)
+ }
+ }
+}
+