diff options
| author | Jim Lawson | 2015-07-24 17:17:01 -0700 |
|---|---|---|
| committer | Jim Lawson | 2015-07-24 17:17:01 -0700 |
| commit | e73450165c59d68b524689a7169e03140a41a1c5 (patch) | |
| tree | b7236f80d9abf60775ecbcefe6f7ca25557dce73 /src/test/scala/ChiselTests/BitsOps.scala | |
| parent | 94893bad972ded686a2c68dd334aa40b92e3b85d (diff) | |
| parent | 3976145bb8c7595ad0f0a7fbb4ccbbd3030d8873 (diff) | |
Merge pull request #1 from ucb-bar/packagedir
Packagedir
Diffstat (limited to 'src/test/scala/ChiselTests/BitsOps.scala')
| -rw-r--r-- | src/test/scala/ChiselTests/BitsOps.scala | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/src/test/scala/ChiselTests/BitsOps.scala b/src/test/scala/ChiselTests/BitsOps.scala new file mode 100644 index 00000000..bfcbaf49 --- /dev/null +++ b/src/test/scala/ChiselTests/BitsOps.scala @@ -0,0 +1,33 @@ +package ChiselTests +import Chisel._ + +class BitsOps extends Module { + val io = new Bundle { + val a = Bits(INPUT, 16) + val b = Bits(INPUT, 16) + val notout = Bits(OUTPUT, 16) + val andout = Bits(OUTPUT, 16) + val orout = Bits(OUTPUT, 16) + val xorout = Bits(OUTPUT, 16) + } + + io.notout := ~io.a + io.andout := io.a & io.b + io.orout := io.a | io.b + io.xorout := io.a ^ io.b +} + +class BitsOpsTester(c: BitsOps) extends Tester(c) { + val mask = (1 << 16)-1; + for (t <- 0 until 16) { + val test_a = rnd.nextInt(1 << 16) + val test_b = rnd.nextInt(1 << 16) + poke(c.io.a, test_a) + poke(c.io.b, test_b) + step(1) + expect(c.io.notout, mask & (~test_a)) + expect(c.io.andout, mask & (test_a & test_b)) + expect(c.io.orout, mask & (test_a | test_b)) + expect(c.io.xorout, mask & (test_a ^ test_b)) + } +} |
