Merge pull request #265 from ucb-bar/gsdt

Gsdt - Fixup to Chisel connections and direction - PR 200 revisited.

1 files changed, 12 insertions, 0 deletions

diff --git a/src/main/scala/chisel3/util/util.scala b/src/main/scala/chisel3/util/util.scala
new file mode 100644
index 00000000..812af21c
--- /dev/null
+++ b/src/main/scala/chisel3/util/util.scala
@@ -0,0 +1,12 @@
+// See LICENSE for license details.
+
+package chisel3
+
+package object util {
+
+  /** Synonyms, moved from main package object - maintain scope. */
+  type ValidIO[+T <: Data] = chisel3.util.Valid[T]
+  val ValidIO = chisel3.util.Valid
+  val DecoupledIO = chisel3.util.Decoupled
+
+}