Merge pull request #1092 from freechipsproject/lfsr-async-reset

LFSR/PRNG Asynchronous Safety, Use Vec[Bool] to store internal state

1 files changed, 2 insertions, 2 deletions

diff --git a/src/main/scala/chisel3/util/random/LFSR.scala b/src/main/scala/chisel3/util/random/LFSR.scala
index 6663940c..a19f40d3 100644
--- a/src/main/scala/chisel3/util/random/LFSR.scala
+++ b/src/main/scala/chisel3/util/random/LFSR.scala
@@ -55,8 +55,8 @@ trait LFSR extends PRNG {
       }
     case None =>
       reduction match {
-        case XOR  => when (reset.toBool) { state := state(width-1, 1) ## 1.U }
-        case XNOR => when (reset.toBool) { state := state(width-1, 1) ## 0.U }
+        case XOR  => when (reset.toBool) { state(0) := 1.U }
+        case XNOR => when (reset.toBool) { state(0) := 0.U }
       }
   }