diff options
| author | Jim Lawson | 2016-12-12 09:14:33 -0800 |
|---|---|---|
| committer | GitHub | 2016-12-12 09:14:33 -0800 |
| commit | b581a24728bfba0c39ed2c032fd86f628a1e1a50 (patch) | |
| tree | f625219f936d39e760192aa69df17e776b95dd56 /src/main/scala/chisel3/util/Reg.scala | |
| parent | 0bd9ae059368570dc72f25f7939afa5cfe5fd06e (diff) | |
| parent | ad53161bbb9f67e16b88ca7a508a537f88d77e05 (diff) | |
Merge branch 'master' into buildinfousepackageaspath
Diffstat (limited to 'src/main/scala/chisel3/util/Reg.scala')
| -rw-r--r-- | src/main/scala/chisel3/util/Reg.scala | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/src/main/scala/chisel3/util/Reg.scala b/src/main/scala/chisel3/util/Reg.scala index 713a3b2e..00005e3a 100644 --- a/src/main/scala/chisel3/util/Reg.scala +++ b/src/main/scala/chisel3/util/Reg.scala @@ -53,12 +53,10 @@ object ShiftRegister * @param n number of cycles to delay * @param en enable the shift */ - def apply[T <: Data](in: T, n: Int, en: Bool = Bool(true)): T = { + def apply[T <: Data](in: T, n: Int, en: Bool = true.B): T = { // The order of tests reflects the expected use cases. - if (n == 1) { - RegEnable(in, en) - } else if (n != 0) { - RegNext(apply(in, n-1, en)) + if (n != 0) { + RegEnable(apply(in, n-1, en), en) } else { in } |
