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authorJim Lawson2016-07-06 09:31:47 -0700
committerJim Lawson2016-07-18 15:49:45 -0700
commit12810b5efe6a8f872fbc1c63cdfb835ca354624f (patch)
tree1fe4d0666e28f15880bbaf164592bd2bba1eff7c /src/main/scala/chisel3/util/Mux.scala
parentc5f9ea3133ef363ff8944e17d94fea79767b6bed (diff)
Update Chisel -> chisel3 references.
Diffstat (limited to 'src/main/scala/chisel3/util/Mux.scala')
-rw-r--r--src/main/scala/chisel3/util/Mux.scala9
1 files changed, 6 insertions, 3 deletions
diff --git a/src/main/scala/chisel3/util/Mux.scala b/src/main/scala/chisel3/util/Mux.scala
index 9d92321a..9956a7e3 100644
--- a/src/main/scala/chisel3/util/Mux.scala
+++ b/src/main/scala/chisel3/util/Mux.scala
@@ -3,7 +3,10 @@
/** Mux circuit generators.
*/
-package Chisel
+package chisel3.util
+
+import chisel3._
+import chisel3.core.SeqUtils
/** Builds a Mux tree out of the input signal vector using a one hot encoded
select signal. Returns the output of the Mux tree.
@@ -37,7 +40,7 @@ object MuxLookup {
* @param mapping a sequence to search of keys and values
* @return the value found or the default if not
*/
- def apply[S <: UInt, T <: Bits] (key: S, default: T, mapping: Seq[(S, T)]): T = {
+ def apply[S <: UInt, T <: Data] (key: S, default: T, mapping: Seq[(S, T)]): T = {
var res = default
for ((k, v) <- mapping.reverse)
res = Mux(k === key, v, res)
@@ -51,7 +54,7 @@ object MuxCase {
/** @param default the default value if none are enabled
* @param mapping a set of data values with associated enables
* @return the first value in mapping that is enabled */
- def apply[T <: Bits] (default: T, mapping: Seq[(Bool, T)]): T = {
+ def apply[T <: Data] (default: T, mapping: Seq[(Bool, T)]): T = {
var res = default
for ((t, v) <- mapping.reverse){
res = Mux(t, v, res)