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authorRichard Lin2016-06-28 10:38:25 -0700
committerGitHub2016-06-28 10:38:25 -0700
commitbc3813ebd752646a92987c74136bb2adb476b687 (patch)
treecc6e0e257f57d87e828a811e8c0c85d5780bb141 /src/main/scala/chisel/util/LFSR.scala
parent3eb51f8484ad21d8a39da1ab7b036f1bb3bbe102 (diff)
parenta367073eaad494e86883b319d3b06bd6e8f05a00 (diff)
Merge pull request #224 from ucb-bar/renamechisel3
renamechisel3 - "chisel" -> "chisel3"
Diffstat (limited to 'src/main/scala/chisel/util/LFSR.scala')
-rw-r--r--src/main/scala/chisel/util/LFSR.scala24
1 files changed, 0 insertions, 24 deletions
diff --git a/src/main/scala/chisel/util/LFSR.scala b/src/main/scala/chisel/util/LFSR.scala
deleted file mode 100644
index f70630bf..00000000
--- a/src/main/scala/chisel/util/LFSR.scala
+++ /dev/null
@@ -1,24 +0,0 @@
-// See LICENSE for license details.
-
-/** LFSRs in all shapes and sizes.
- */
-
-package chisel.util
-
-import chisel._
-
-// scalastyle:off magic.number
-/** linear feedback shift register
- */
-object LFSR16
-{
- def apply(increment: Bool = Bool(true)): UInt =
- {
- val width = 16
- val lfsr = Reg(init=UInt(1, width))
- when (increment) { lfsr := Cat(lfsr(0)^lfsr(2)^lfsr(3)^lfsr(5), lfsr(width-1,1)) }
- lfsr
- }
-}
-// scalastyle:on magic.number
-