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authorducky2016-05-20 18:09:57 -0700
committerducky2016-06-08 16:22:27 -0700
commitf36524e388b060b1bb535ae21cb1bcbbea220be9 (patch)
treea32772f816f18b14002948964917be0cb8280c48 /src/main/scala/chisel/Main.scala
parent53813f61b7dfe246d214ab966739d01c65c8ecb0 (diff)
Rename packages to lowercase chisel, add compatibility layer
Diffstat (limited to 'src/main/scala/chisel/Main.scala')
-rw-r--r--src/main/scala/chisel/Main.scala17
1 files changed, 17 insertions, 0 deletions
diff --git a/src/main/scala/chisel/Main.scala b/src/main/scala/chisel/Main.scala
new file mode 100644
index 00000000..79e5c9ca
--- /dev/null
+++ b/src/main/scala/chisel/Main.scala
@@ -0,0 +1,17 @@
+// See LICENSE for license details.
+
+package chisel
+
+import java.io.File
+
+@deprecated("chiselMain doesn't exist in Chisel3", "3.0") object chiselMain {
+ def apply[T <: Module](args: Array[String], gen: () => T): Unit =
+ Predef.assert(false, "No more chiselMain in Chisel3")
+
+ def run[T <: Module] (args: Array[String], gen: () => T): Unit = {
+ val circuit = Driver.elaborate(gen)
+ Driver.parseArgs(args)
+ val output_file = new File(Driver.targetDir + "/" + circuit.name + ".fir")
+ Driver.dumpFirrtl(circuit, Option(output_file))
+ }
+}