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authorRichard Lin2016-06-08 17:12:42 -0700
committerRichard Lin2016-06-08 17:12:42 -0700
commit07fa5622ccc995f925d6d967d2a386540c9064cc (patch)
treefab4d62dba2ffb78e673ee54939d9088739a79f1 /src/main/scala/Chisel/util/Lookup.scala
parent53813f61b7dfe246d214ab966739d01c65c8ecb0 (diff)
parent68447044e8eba5c8f525639130f1a347677ff543 (diff)
Merge pull request #197 from ucb-bar/lowercaseChisel
Rename package Chisel to chisel, add Chisel package for compatibility
Diffstat (limited to 'src/main/scala/Chisel/util/Lookup.scala')
-rw-r--r--src/main/scala/Chisel/util/Lookup.scala17
1 files changed, 0 insertions, 17 deletions
diff --git a/src/main/scala/Chisel/util/Lookup.scala b/src/main/scala/Chisel/util/Lookup.scala
deleted file mode 100644
index 54922fc4..00000000
--- a/src/main/scala/Chisel/util/Lookup.scala
+++ /dev/null
@@ -1,17 +0,0 @@
-// See LICENSE for license details.
-
-package Chisel
-
-object ListLookup {
- def apply[T <: Data](addr: UInt, default: List[T], mapping: Array[(BitPat, List[T])]): List[T] = {
- val map = mapping.map(m => (m._1 === addr, m._2))
- default.zipWithIndex map { case (d, i) =>
- map.foldRight(d)((m, n) => Mux(m._1, m._2(i), n))
- }
- }
-}
-
-object Lookup {
- def apply[T <: Bits](addr: UInt, default: T, mapping: Seq[(BitPat, T)]): T =
- ListLookup(addr, List(default), mapping.map(m => (m._1, List(m._2))).toArray).head
-}