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| author | Jim Lawson | 2016-07-19 13:43:48 -0700 |
|---|---|---|
| committer | Jim Lawson | 2016-07-19 13:43:48 -0700 |
| commit | b27f29902d9f1d886e8edf1fc5e960cf9a634184 (patch) | |
| tree | c6f3e27e46e5ed9c3cc62f2c368c766cdded74c6 /src/main/scala/Chisel/util/LFSR.scala | |
| parent | 083610b2faa456dfccc4365dd115565d36e522fa (diff) | |
| parent | 12810b5efe6a8f872fbc1c63cdfb835ca354624f (diff) | |
Merge branch 'sdtwigg_rebase_renamechisel3' into sdtwigg_wrap_renamechisel3
Diffstat (limited to 'src/main/scala/Chisel/util/LFSR.scala')
| -rw-r--r-- | src/main/scala/Chisel/util/LFSR.scala | 22 |
1 files changed, 0 insertions, 22 deletions
diff --git a/src/main/scala/Chisel/util/LFSR.scala b/src/main/scala/Chisel/util/LFSR.scala deleted file mode 100644 index 839b1d1f..00000000 --- a/src/main/scala/Chisel/util/LFSR.scala +++ /dev/null @@ -1,22 +0,0 @@ -// See LICENSE for license details. - -/** LFSRs in all shapes and sizes. - */ - -package Chisel - -// scalastyle:off magic.number -/** linear feedback shift register - */ -object LFSR16 -{ - def apply(increment: Bool = Bool(true)): UInt = - { - val width = 16 - val lfsr = Reg(init=UInt(1, width)) - when (increment) { lfsr := Cat(lfsr(0)^lfsr(2)^lfsr(3)^lfsr(5), lfsr(width-1,1)) } - lfsr - } -} -// scalastyle:on magic.number - |