diff options
| author | Jack Koenig | 2020-03-25 19:51:46 -0700 |
|---|---|---|
| committer | GitHub | 2020-03-25 19:51:46 -0700 |
| commit | dbb024a9adee6d82f37e357cf8b55456674ff65c (patch) | |
| tree | 578858ab6d219ca6daf44cf87b73f75054989097 /chiselFrontend/src/main/scala/chisel3/Clock.scala | |
| parent | 6263fcc56b630b7181eb30680cadcdbb2bdf91dc (diff) | |
| parent | fbf5e6f1a0e8bf535d465b748ad554575fe62156 (diff) | |
Merge pull request #1384 from freechipsproject/no-more-compile-internal
No more compile internal
Diffstat (limited to 'chiselFrontend/src/main/scala/chisel3/Clock.scala')
| -rw-r--r-- | chiselFrontend/src/main/scala/chisel3/Clock.scala | 43 |
1 files changed, 0 insertions, 43 deletions
diff --git a/chiselFrontend/src/main/scala/chisel3/Clock.scala b/chiselFrontend/src/main/scala/chisel3/Clock.scala deleted file mode 100644 index d7975b1e..00000000 --- a/chiselFrontend/src/main/scala/chisel3/Clock.scala +++ /dev/null @@ -1,43 +0,0 @@ -// See LICENSE for license details. - -package chisel3 - -import scala.language.experimental.macros -import chisel3.internal.Builder.pushOp -import chisel3.internal.firrtl._ -import chisel3.internal.sourceinfo._ -import chisel3.internal.firrtl.PrimOp.AsUIntOp - -object Clock { - def apply(): Clock = new Clock -} - -// TODO: Document this. -sealed class Clock(private[chisel3] val width: Width = Width(1)) extends Element { - override def toString: String = s"Clock$bindingToString" - - def cloneType: this.type = Clock().asInstanceOf[this.type] - - private[chisel3] def typeEquivalent(that: Data): Boolean = - this.getClass == that.getClass - - override def connect(that: Data)(implicit sourceInfo: SourceInfo, connectCompileOptions: CompileOptions): Unit = that match { // scalastyle:ignore line.size.limit - case _: Clock => super.connect(that)(sourceInfo, connectCompileOptions) - case _ => super.badConnect(that)(sourceInfo) - } - - override def litOption: Option[BigInt] = None - - /** Not really supported */ - def toPrintable: Printable = PString("CLOCK") - - /** Returns the contents of the clock wire as a [[Bool]]. */ - final def asBool(): Bool = macro SourceInfoTransform.noArg - def do_asBool(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool = this.asUInt().asBool() - - override def do_asUInt(implicit sourceInfo: SourceInfo, connectCompileOptions: CompileOptions): UInt = pushOp(DefPrim(sourceInfo, UInt(this.width), AsUIntOp, ref)) // scalastyle:ignore line.size.limit - private[chisel3] override def connectFromBits(that: Bits)(implicit sourceInfo: SourceInfo, - compileOptions: CompileOptions): Unit = { - this := that.asBool.asClock - } -} |
