diff options
| author | Aditya Naik | 2024-03-07 09:26:46 -0800 |
|---|---|---|
| committer | Aditya Naik | 2024-03-07 09:26:46 -0800 |
| commit | 7e16bac1a2d7caf9f38c3934eab7bf0db982a312 (patch) | |
| tree | 4a0505e87385889746f30889b5f37592be5fd047 /AbstractModuleStandalone.scala | |
| parent | 6a132a490c280684fd27f09a3af2249faf4d13d1 (diff) | |
Move methods to library
Diffstat (limited to 'AbstractModuleStandalone.scala')
| -rw-r--r-- | AbstractModuleStandalone.scala | 16 |
1 files changed, 3 insertions, 13 deletions
diff --git a/AbstractModuleStandalone.scala b/AbstractModuleStandalone.scala index 050cd4f4..a896b1f7 100644 --- a/AbstractModuleStandalone.scala +++ b/AbstractModuleStandalone.scala @@ -1,16 +1,5 @@ import chisel3._ -object MetaConnect { - implicit class Connection[A](that: A) { - def makeConnection[B, C](me: B)(implicit f: A => B => C): C = { - f(that)(me) - } - } - implicit def abstractInterfaceConnection[A, B, C](implicit f: A => B => C): AbstractInterface[A] => AbstractInterface[B] => AbstractInterface[C] = (a: AbstractInterface[A]) => (b: AbstractInterface[B]) => new AbstractInterface(f(a.params)(b.params)) -} - -case class AbstractInterface[T](params: T) - object TypeArithmetic { implicit val f1: SomeTypeContainer => SomeTypeContainer => SomeTypeContainer = (a: SomeTypeContainer) => (b: SomeTypeContainer) => new SomeTypeContainer(a.i+b.i) implicit val f2: SomeTypeContainer => Int => SomeTypeContainer = (a: SomeTypeContainer) => (b: Int) => new SomeTypeContainer(b+a.i) @@ -18,8 +7,9 @@ object TypeArithmetic { val litval: Int = 1 new SomeTypeContainer(litval.toInt+a.i) } - // Dynamically create a wire - implicit val f4: UInt => UInt => (() => Any) = (a: UInt) => (b: UInt) => (() => Wire(a)) + // Dynamically create an IO + // implicit val f4: UInt => UInt => (() => Any) = (a: UInt) => (b: UInt) => (() => Wire(a)) + implicit val f5 = (new Op[UInt, UInt, () => UInt]((a: UInt) => (b: UInt) => (() => IO(a)))).f } case class SomeTypeContainer(i: Int) |
