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authorAditya Naik2024-02-14 15:51:57 -0800
committerAditya Naik2024-02-14 15:51:57 -0800
commit0192314ca92572f79933c5101342b8c38022e566 (patch)
treef3f8e7bc750a6a0faa11b25001e462f68cf3fbd5
parente7bdafd06c0760c562b27ce8a483493ce7f06864 (diff)
Get AbstractInterface arithmetic working
-rw-r--r--AbstractModule.scala8
-rw-r--r--AbstractModuleStandalone.scala44
-rw-r--r--log.org9
-rw-r--r--src/main/scala/chisel3/stage/phases/Elaborate.scala6
4 files changed, 60 insertions, 7 deletions
diff --git a/AbstractModule.scala b/AbstractModule.scala
index 5da2550a..103d598f 100644
--- a/AbstractModule.scala
+++ b/AbstractModule.scala
@@ -5,8 +5,8 @@ import chisel3.stage.ChiselStage
import chisel3.MetaConnect._
object TypeArithmetic {
- implicit val f1: UInt => UInt => UInt = (a: UInt) => (b: UInt) => Mux(a > b, a, b)
- implicit val f2: SomeTypeContainer => Unit => SomeTypeContainer = (a: SomeTypeContainer) => (b: Unit) => a
+ // implicit val f1: UInt => UInt => UInt = (a: UInt) => (b: UInt) => Mux(a > b, a, b)
+ implicit val f2: SomeTypeContainer => UInt => SomeTypeContainer = (a: SomeTypeContainer) => (b: UInt) => new SomeTypeContainer(b.litValue.toInt+a.w)
}
case class SomeTypeContainer(w: Int) extends UInt(w.W)
@@ -17,8 +17,8 @@ class AbstractModuleContainer extends AbstractModule({
val mod3 = new AbstractInterface[SomeTypeContainer](Output(SomeTypeContainer(16)))
import TypeArithmetic._
- val typeA = mod1.ioNode.makeConnection(mod2.ioNode)
- val typeB = mod2.ioNode.makeConnection(mod3.ioNode)
+ val typeA = mod3.ioNode.makeConnection(mod2.ioNode)
+ // val typeB = mod2.ioNode.makeConnection(mod3.ioNode)
// println(s"\ttypeA: ${typeA}\n\ttypeB: ${typeB}")
// need to create versions of mods1-3 with these new type params
// similar to log aggregation writer monad? but more like type aggregation
diff --git a/AbstractModuleStandalone.scala b/AbstractModuleStandalone.scala
new file mode 100644
index 00000000..5f94b7e8
--- /dev/null
+++ b/AbstractModuleStandalone.scala
@@ -0,0 +1,44 @@
+import chisel3._
+
+object MetaConnect {
+ implicit class Connection[A](that: A) {
+ def makeConnection[B, C](me: B)(implicit f: A => B => C): C = {
+ f(that)(me)
+ }
+ }
+ implicit def abstractInterfaceConnection[A, B, C](implicit f: A => B => C): AbstractInterface[A] => AbstractInterface[B] => AbstractInterface[C] = (a: AbstractInterface[A]) => (b: AbstractInterface[B]) => new AbstractInterface(f(a.params)(b.params))
+}
+
+
+
+case class AbstractInterface[T](params: T)
+
+object TypeArithmetic {
+ implicit val f1: SomeTypeContainer => SomeTypeContainer => SomeTypeContainer = (a: SomeTypeContainer) => (b: SomeTypeContainer) => new SomeTypeContainer(a.i+b.i)
+ implicit val f2: SomeTypeContainer => Int => SomeTypeContainer = (a: SomeTypeContainer) => (b: Int) => new SomeTypeContainer(b+a.i)
+ implicit val f3: SomeTypeContainer => UInt => SomeTypeContainer = (a: SomeTypeContainer) => (b: UInt) => {
+ val litval: Int = 1
+ new SomeTypeContainer(litval.toInt+a.i)
+ }
+}
+
+case class SomeTypeContainer(i: Int)
+
+object AbstractModuleStandalone {
+ def main(args: Array[String]): Unit = {
+ val foo: Int = 1
+ val bar: SomeTypeContainer = SomeTypeContainer(2)
+ val baz: UInt = UInt(1.W)
+
+ val afoo = AbstractInterface[UInt](Input(UInt(4.W)))
+ val abar = AbstractInterface[UInt](Output(UInt(8.W)))
+ val abaz = AbstractInterface[SomeTypeContainer](SomeTypeContainer(16))
+
+ import MetaConnect._
+ import TypeArithmetic._
+ bar makeConnection foo makeConnection bar makeConnection bar
+ bar makeConnection baz makeConnection foo
+
+ abaz makeConnection afoo
+ }
+}
diff --git a/log.org b/log.org
index 7d0b13e1..82cc8eae 100644
--- a/log.org
+++ b/log.org
@@ -18,3 +18,12 @@
- `connectTypes` resolve types /and/ make the IO connections at the
same time.
+* [2024-02-14 Wed] Wokring AbstractInterface arithmetic
+** log
+- Add a new file AbstractModuleStandalone.scala which i copied over from scastie
+- Add a new implicit generic function =abstractInterfaceConnection=
+ which allows perfoming computations on AbstractInterfaces. Now, the
+ user only needs to supply type arithmetic on =A => B => C= in order
+ to get =AbstractInterface[A] => AbstractInterface[B] =>
+ AbstractInterface[C]= to work.
+- Next step will to be figure out multiple arities for =AbstractInterface=
diff --git a/src/main/scala/chisel3/stage/phases/Elaborate.scala b/src/main/scala/chisel3/stage/phases/Elaborate.scala
index a3fc4990..5e81caa5 100644
--- a/src/main/scala/chisel3/stage/phases/Elaborate.scala
+++ b/src/main/scala/chisel3/stage/phases/Elaborate.scala
@@ -43,9 +43,9 @@ class Elaborate extends Phase {
/* if any throwable comes back and we're in "stack trace trimming" mode, then print an error and trim the stack trace
*/
case scala.util.control.NonFatal(a) =>
- if (!chiselOptions.printFullStackTrace) {
- a.trimStackTraceToUserCode()
- }
+ // if (!chiselOptions.printFullStackTrace) {
+ // a.trimStackTraceToUserCode()
+ // }
throw (a)
}
case a => Some(a)