* Promote ChiselEnum user APIs from experimental (#2929)

They are commonly used and if we were ever to change them, we will need
to go through a deprecation process anyway.

Note that the EnumAnnotations remain in chisel3.experimental because,
like all Chisel annotation support, they are slated to be deprecated and
removed.

(cherry picked from commit 424e9446f1675fe0168e22bdfbbe85db997376e6)

# Conflicts:
#	docs/src/cookbooks/verilog-vs-chisel.md
#	docs/src/explanations/chisel-enum.md

* Maintain binary compatbility, use aliases in chisel3 package

* Deprecate the actual classes in chisel3.experimental
* Also fix backport conflicts

Co-authored-by: Jack Koenig <koenig@sifive.com>

* Add PartialDataView.supertype (#2826)

This factory method makes it easy to create PartialDataViews from a
Bundle type to its supertype. Because of the typing relationship, there
is no need to provide a mapping between fields. The only thing necessary
is to provide a function for constructing an instance of the supertype
from an instance of the subtype.

(cherry picked from commit 251d454a224e5a961438ba0ea41134d7da7a5992)

# Conflicts:
#	core/src/main/scala/chisel3/experimental/dataview/package.scala
#	src/test/scala/chiselTests/experimental/DataView.scala

* Resolve backport conflicts

Co-authored-by: Jack Koenig <koenig@sifive.com>

* Don't invalidate ExtModule ports in an explicitInvalidate = true context (#2795)

* Don't invalidate ExtModule ports in an explicitInvalidate = true context

ExtModule ports were previously invalidated in the emitted FIRRTL, which is correct in a NonStrict / `Chisel._` compatibility context but not in newer chisel3 code where `explicitInvalidate = true`.

(cherry picked from commit 8e24a281545d25f6501dcc872eabdfb30bacd69d)

# Conflicts:
#	core/src/main/scala/chisel3/BlackBox.scala

* Resolve backport conflicts

Co-authored-by: Jared Barocsi <82000041+jared-barocsi@users.noreply.github.com>
Co-authored-by: Jack Koenig <koenig@sifive.com>

Co-authored-by: Jack Koenig <koenig@sifive.com>
(cherry picked from commit fc970ca28e562f2ea3ba160963604ea3deaf3467)

Co-authored-by: Megan Wachs <megan@sifive.com>

* Cleanup Cookbook and printing docs
* Format specifiers are actually concise now

Co-authored-by: Megan Wachs <megan@sifive.com>
(cherry picked from commit df2a71833ffc8ee8a053a1e8ea41c482e46be132)

Co-authored-by: Aditya Naik <91489422+adkian-sifive@users.noreply.github.com>

* Add a cookbook and publicly visible scaladoc for prefix, noPrefix

(cherry picked from commit ae7dc30b3b99f1fbd91c35f54bc19be7c55f74a3)

Co-authored-by: Megan Wachs <megan@sifive.com>

(cherry picked from commit d54a37a51b16fb6e46093265d65fd47d5318f67f)

Co-authored-by: Jack Koenig <koenig@sifive.com>

* Capture 1:1 mappings of Aggregates inside of views

This is implemented by including any corresponding Aggregates from the
DataView.mapping in the AggregateViewBinding.childMap (which is now of
type Map[Data, Data]).

This enables dynamically indexing Vecs that are themselves elements of
larger Aggregates in views when the corresponding element of the view is
a Vec of the same type. It also increases the number of cases where a
single Target can represent part of a view.

(cherry picked from commit 1f6b1ca14ccf86918065073c3f6f3626dd83a68e)

* Add FlatIO API for creating ports from Bundles without a prefix

(cherry picked from commit 772a3a1fe3b9372b7c2d7cd2d424b2adcd633cdb)

* [docs] Add FlatIO to the general cookbook

(cherry picked from commit b4159641350f238f0f899b69954142ce8ee11544)

Co-authored-by: Jack Koenig <koenig@sifive.com>

(cherry picked from commit d4dd21191c63a3b125193a7ffb83d478aa945d5a)

Co-authored-by: Jack Koenig <koenig@sifive.com>

* Tweaks to the Verilog-vs-Chisel Page

* Update cookbook.md

* Update verilog-vs-chisel.md

* Update verilog-vs-chisel.md

(cherry picked from commit 7432bdff8369ba55db73c7934e41bb6f4060bb6d)

Co-authored-by: Megan Wachs <megan@sifive.com>