* Promote ChiselEnum user APIs from experimental (#2929)

They are commonly used and if we were ever to change them, we will need
to go through a deprecation process anyway.

Note that the EnumAnnotations remain in chisel3.experimental because,
like all Chisel annotation support, they are slated to be deprecated and
removed.

(cherry picked from commit 424e9446f1675fe0168e22bdfbbe85db997376e6)

# Conflicts:
#	docs/src/cookbooks/verilog-vs-chisel.md
#	docs/src/explanations/chisel-enum.md

* Maintain binary compatbility, use aliases in chisel3 package

* Deprecate the actual classes in chisel3.experimental
* Also fix backport conflicts

Co-authored-by: Jack Koenig <koenig@sifive.com>

* Check for Vec subaccess in NamedComponent and throw a nicer error. (#2907)

This would previously end up throwing an exception later, when trying
to create a component name and realizing that it was invalid. Instead,
this detects Vec subaccesses early, and gives a more precise error and
suggestion.

(cherry picked from commit d8c30961c7b293ee19024a487698630367ee71c6)

# Conflicts:
#	core/src/main/scala/chisel3/internal/Builder.scala

* Resolve backport conflicts

Co-authored-by: Mike Urbach <mikeurbach@gmail.com>

ChiselEnums check if they should create annotations every time an
instance of them is bound. Because so many annotations would be created,
they check to see if an equivalent annotation has already been added to
the annotations. Previously, this used a linear search of the
annotations, now it uses a HashSet.

(cherry picked from commit 96bde092e449281dc70ebdb05f21695468c3e5fa)

Co-authored-by: Jack Koenig <koenig@sifive.com>

Co-authored-by: Aditya Naik <aditya.naik@sifive.com>

* Make PriorityMux stack safe (#2854)

It used to be implemented with recursion, now it's implemented with a
stack safe reverse and foldLeft.

Also there were no tests for PriorityMux so I added one which helps
prove the change is functionally correct.

(cherry picked from commit 269ce472e9aa0c242fc028871a1fd5b045c82f83)

# Conflicts:
#	src/test/scala/chiselTests/util/PipeSpec.scala

* Resolve backport conflicts

Co-authored-by: Jack Koenig <koenig@sifive.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

* Implement compressed Namespace (#2856)

The namespace disambiguates requests for the same name with _<idx>.
Rather than storing every disambiguated name in the underlying HashMap,
it now only stores the base along with the "next available" index. This
makes the logic for checking if a name is already contained in the
namespace slightly more sophisticated because users can name things in a
way that will collide with disambiguated names from a common substring.

For example, in naming the sequence "foo", "foo", "foo_1", the 2nd "foo"
takes the name "foo_1" so the following "foo_1" gets disambiguated to
"foo_1_1". But since we compressed that original "foo_1" into the same
HashMap entry as just "foo", we have to do a form of "prefix checking"
whenever naming something that ends in "_<idx>".

In practice, the saved memory allocations more than make up for the more
complicated logic to disambiguate names because the common case is still
fast.

(cherry picked from commit 1654d87a02ca799bf12805a611a91e7524d49843)

# Conflicts:
#	core/src/main/scala/chisel3/internal/Builder.scala

* Resolve backport conflicts

Co-authored-by: Jack Koenig <koenig@sifive.com>

(cherry picked from commit 49feb083c69066988ca0666ea4249a86570e2589)

Co-authored-by: Megan Wachs <megan@sifive.com>

* Change RawModule._commands to a VectorBuilder (#2839)

* Change RawModule._commands to a VectorBuilder

Use the resulting Vector to build the underlying Component's commands
and then use those instead of copying the original ArrayBuffer when
iterating on commands. Previously, the Component was using a List to
hold the commands which is particularly memory inefficient, especially
for large modules.

* Optimize Converter's handling of Seq[Command]

It previously converted the Commands to a List (which, while not
captured in the type system, they were already a List) and then used
head and tail iteration. This is less efficient with the new underlying
Vector implementation.

(cherry picked from commit 48a1ef0a3872c6b68d46145764d977926923a270)

* Waive false binary compatibility failures

Co-authored-by: Jack Koenig <koenig@sifive.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

* Add internal methods to maintain binary compatibility

Co-authored-by: Megan Wachs <megan@sifive.com>
Co-authored-by: Jack Koenig <koenig@sifive.com>

* Fixup and unit tests for D/I of IOs without explicit Input/Output (#2792)

(cherry picked from commit f24a624863f0fc460fd862238688ea8612ffdf5e)

# Conflicts:
#	core/src/main/scala/chisel3/Module.scala

* Resolve backport conflicts

Co-authored-by: Megan Wachs <megan@sifive.com>
Co-authored-by: Jack Koenig <koenig@sifive.com>